labels: Semiconductors
DuPont, Nippon Kayaku to jointly develop wafer packaging technology news
05 March 2009

DuPont Wafer Level Packaging Solutions, part of DuPont Electronic Technologies, has signed a joint-development agreement with Nippon Kayaku Co Ltd and its wholly owned subsidiary, MicroChem Corporation, for developing new semiconductor packaging technologies.

Wafer level packaging technology is used to package an integrated circuit at wafer level instead of the traditional process of assembling the package of each individual unit after wafer dicing.

Under the agreement, they will jointly develop advanced photodefinable epoxy-based electronic materials for wafer level packaging, 3D and through-silicon via (TSV) semiconductor packaging applications.

The new packaging system would make wafers smaller, light weight, more functional and more cost-effective.

''Combining the expertise of Nippon Kayaku and MicroChem in advanced epoxy resins and formulation, with DuPont coating technology, material science and electronic applications knowledge means that we can generate a series of enabling materials faster,'' said Mats Ehlin, global business manager, DuPont Wafer Level Packaging Solutions.

''We're excited about this opportunity to further expand our offering and strengthen our ability to help customers meet their needs for improved performance, form factor and reduced cost,'' he added.

DuPont expects the materials market for wafer level packaging, 3D and TSV to grow from about $100 million in 2009, to more than $600 million in 2013, and could as much as double to $1.2 billion by 2015.


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DuPont, Nippon Kayaku to jointly develop wafer packaging technology