Fujitsu launches digital HDTV system-on-chip , multi-decoder for enhanced performance

Bangalore: Fujitsu Microelectronics Asia Pte Ltd has developed the MB86H70, a digital HDTV system-on-chip (SoC) that integrates a video processing engine for superior picture quality. The company has also introduced a full high-definition (full HD, 1920 dots x 1080 lines) multi-decoder that decodes MPEG-2 as well as H.264 video compression formats.

The chip is an application specific standard product (ASSP), that features a video processing engine that was co-developed with Fujitsu Laboratories. By also including a proprietary picture quality adjustment tool that makes it possible for picture adjustment parameters to be easily set simply by using a mouse, the new LSI enables TV set makers to dramatically improve their design efficiencies for picture quality settings.

Furthermore, SoC integration of the video processing engine and multi-decoder allow common memory to be used, enabling use of the chip by simply adding two 16-bit external memories and thereby reducing TV set makers' costs and development cycles for both design development and manufacturing.

This chip includes full HD MPEG-2 and H.264 decoders and thus can be used for current SD MPEG-2 broadcasts used widely in Europe and other regions, and for next-generation HD broadcasts using H.264. Includes audio decoders necessary for HD broadcasts in Europe such as Dolby Digital, Dolby Digital Plus and HE-AAC.

Sample shipment of this new SoC will start from mid-October 2008, said the company.

Currently, in various regions such as Europe, digital TV broadcasting is offered in standard definition (SD) using the MPEG-2 video compression format. Next-generation broadcasts will be in HD, with the main format being  H.264. For example in France, HD digital TVs that are scheduled to be released to the market from the end of 2008 are required to be equipped with H.264 decoders.